Security Evaluation of Asynchronous Circuits-Reference-Cited by-同舟云学术

Security Evaluation of Asynchronous Circuits

Published:2003 Issue: Volume: Page:137-151
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
Short-container-title:

Author:

Fournier Jacques J. A.,Moore Simon,Li Huiyun,Mullins Robert,Taylor George

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-540-45238-6_12

Reference10 articles.

1. Moore, S., Anderson, R., Cunningham, P., Mullins, R., Taylor, G.: Improving Smart Card Security using Self-timed Circuits. In: Proc. 8th IEEE International Symposium on Asynchronous Circuits and Systems – ASYNC 2002, pp. 23–58. IEEE, Los Alamitos (2002)

2. Plana, L.A., Riocreux, P.A., Bainbridge, W.J., Bardsley, A., Garside, J.D., Temple, S.: SPA - a synthesisable amulet core for smartcard applications. In: Proc. 8th IEEE International Symposium on Asynchronous Circuits and Systems – ASYNC 2002, pp. 201–210. IEEE, Los Alamitos (2002)

3. Lecture Notes in Computer Science;R. Mayer-Sommer,2000

4. http://www.synopsys.com/products/power/primepower_ds.html

5. Lecture Notes in Computer Science;D. Boneh,1997

Cited by 44 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Area Efficient Asynchronous Circuits for Side Channel Attack Mitigation;2022 IEEE 40th International Conference on Computer Design (ICCD);2022-10

2. THx2 Programmable Logic Block Architecture for Clockless Asynchronous FPGAs;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-07

3. Critical Datapath Cells for NCL Asynchronous Circuit Area Reduction;NAECON 2021 - IEEE National Aerospace and Electronics Conference;2021-08-16

4. Side Channel Attack Countermeasure for Low Power Devices with AES Encryption;2021 IEEE International Conference on Automation/XXIV Congress of the Chilean Association of Automatic Control (ICA-ACCA);2021-03-22

5. Asynchronous Circuits and Their Applications in Hardware Security;Emerging Topics in Hardware Security;2021