A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware

Author:

Ahmadinia Ali,Bobda Christophe,Teich Jürgen

Publisher

Springer Berlin Heidelberg

Reference8 articles.

1. Bazargan, K., Kastner, R., Sarrafzadeh, M.: Fast Template Placement for Reconfigurable Computing Systems. IEEE Design and Test of Computers 17, 68–83 (2000)

2. Ahmadinia, A., Teich, J.: Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead. To appear in Proceedings of 12th IFIP VLSI-SOC (December 2003)

3. Walder, H., Steiger, C., Platzner, M.: Fast Online Task Placement on FPGAs: Free Space Partitioning and 2-D Hashing. In: Proceedings of the 17th Inter-national Parallel and Distributed Processing Symposium (IPDPS) / Reconfigurable Architectures Workshop (RAW), April 2003, IEEE-CS Press, New York (2003)

4. Wigley, G., Kearney, D.: Research Issues in Operating Systems for Reconfigurable Computing. In: Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Architectures (ERSA), June 2002, CSREA Press, Las Vegas (2002)

5. Diessel, O., ElGindy, H.: On scheduling dynamic FPGA reconfigurations. In: Hawick, K.A., James, H.A. (eds.) Proceedings of the Fifth Australasian Conference on Parallel and Real-Time Systems (PART 1998), Singapore, pp. 191–200. Springer, Heidelberg (1998)

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2. A Cost Model for Partial Dynamic Reconfiguration;Lecture Notes in Computer Science;2011

3. A New Metric for On-Line Scheduling and Placement in Reconfigurable Computing Systems;Algorithms and Architectures for Parallel Processing;2010

4. An Improved Greedy Based Global Optimized Placement Algorithm;Advances in Soft Computing;2009

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