Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver-Reference-Cited by-同舟云学术

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Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver

Published: Issue: Volume: Page:66-81
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Container-title:Automated Technology for Verification and Analysis
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Author:

Walter David,Little Scott,Myers Chris

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-540-75596-8_7.pdf

Reference28 articles.

1. Kurshan, R.P., McMillan, K.L.: Analysis of digital circuits through symbolic reduction. IEEE Transactions on CAD 10(11), 1356–1371 (1991)

2. Hartong, W., Hedrich, L., Barke, E.: Model checking algorithms for analog verification. In: Proc. of DAC, pp. 542–547 (2002)

3. Gupta, S., Krogh, B.H., Rutenbar, R.A.: Towards formal verification of analog designs. In: Proc. of ICCAD, pp. 210–217 (2004)

4. Lecture Notes in Computer Science;T. Dang,2004

5. Frehse, G., Krogh, B.H., Rutenbar, R.A.: Verifying analog oscillator circuits using forward/backward refinement. In: Proc. of DATE, pp. 257–262 (2006)

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Framework for Formally Verifying Analog and Mixed-Signal Designs;Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design;2015

2. Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces;Automated Technology for Verification and Analysis

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