3-Valued Circuit SAT for STE with Automatic Refinement-Reference-Cited by-同舟云学术

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3-Valued Circuit SAT for STE with Automatic Refinement

Published:2007 Issue: Volume: Page:457-473
ISSN:0302-9743
Container-title:Automated Technology for Verification and Analysis
language:
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Author:

Grumberg Orna,Schuster Assaf,Yadgar Avi

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-540-75596-8_32

Reference24 articles.

1. Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., Zhu, Y.: Symbolic model checking using SAT procedures instead of BDDs. In: DAC, IEEE Computer Society Press, Los Alamitos (1999)

2. Lecture Notes in Computer Science;P. Bjesse,2001

3. Clarke, E.M., Grumberg, O., Jha, S., Lu, Y., Veith, H.: Counterexample-guided abstraction refinement. Journal of the ACM 50(5), 752–794 (2003)

4. Lecture Notes in Computer Science;K. Classen,2005

5. Davis, M., Logemann, G., Loveland, D.: A machine program for theorem proving. CACM 5(7) (July 1962)

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