Error Correction Schemes with Erasure Information for Fast Memories
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-014-5440-1.pdf
Reference22 articles.
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3. Chishti Z, Alameldeen AR, Wilkerson C, Wu W, Lu S-L (2009) Improving cache lifetime reliability at ultra-low voltages. IEEE/ACM International Symposium on Microarchitecture, MICRO-42, New York City
4. Dell TJ (1997) A white paper on the benefits of chipkill-correct ECC for PC server main memory. IBM Microelectronics Division
5. Dimitrov DV, Gao Z, Wang X, Jung W, Lou X, Heinonen OG (2009) Dielectric breakdown of MgO magnetic tunnel junctions. Appl Phys Lett 94:123110
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