Design of Two-Tone RF Generator for On-Chip IP3/IP2 Test

Author:

Ahmad ShakeelORCID,Dąbrowski Jerzy

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Reference23 articles.

1. Abidi AA (2006) Phase noise and jitter in CMOS ring oscillators. IEEE J Solid State Circuits 41(8):1803–1816

2. Ahmad S et al (2010) Two-tone PLL for on-chip IP3 test. Proc. IEEE international symposium of circuits and systems (ISCAS) pp 3549–52

3. Badillo DA, Kiaei S (2004) Comparison of contemporary CMOS ring oscillators. Proc. IEEE Radio Frequency Integrated Circuits (RFIC) pp 281–284

4. Badillo DA, Kiaei S (2004) A low phase noise 2.0 V 900 MHz CMOS voltage controlled ring oscillator. Proc. IEEE International Symposium of Circuits and Systems (ISCAS) pp 533–536

5. Banerjee G, Behera M (2011) Signal generator for a built-in self test. U.S. Patent Publication No. US20110273197 A1

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1. One-Bit ΣΔ-Encoded Stimulus Generation for On-Chip ADC Test;Journal of Circuits, Systems and Computers;2020-07-02

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