A Study of PN Junction Diffusion Capacitance of MOSFET in Presence of Single Event Transient
Author:
Funder
Equipment Pre-research Project of China
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/article/10.1007/s10836-017-5694-5/fulltext.html
Reference15 articles.
1. Artola L, Gaillardin M, Hubert G, Raine M, Paillet P (2015) Modeling Single Event Transients in Advanced Devices and ICs. IEEE Trans Nucl Sci 62(4):1528–1539
2. Black DA, Robinson WH, Wilcox IZ, Limbrick DB, Black JD (2015) Modeling of Single Event Transients With Dual Double-Exponential Current Sources: Implications for Logic Cell Characterization. IEEE Trans Nucl Sci 62(4):1540–1549
3. Ferlet-Cavrois V, Massengill LW, Gouker P (2013) Single Event Transients in Digital CMOS—A Review. IEEE Trans Nucl Sci 60(3):1797–1790
4. GSEAT 1.9.0: User’s Guide (2017) Cogenda Pte Ltd. Su Zhou, China
5. He YB, Chen SM (2012) Impact of Circuit Placement on Single Event Transients in 65 nm Bulk CMOS Technology. IEEE Trans Nucl Sci 59(6):2772–2777
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