Address Remapping Techniques for Enhancing Fabrication Yield of Embedded Memories-Reference-Cited by-同舟云学术

Address Remapping Techniques for Enhancing Fabrication Yield of Embedded Memories

Published:2018-07-16 Issue:4 Volume:34 Page:435-446
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Lu Shyue-Kung^ORCID,Jheng Hao-Cheng,Lin Hao-Wei,Hashizume Masaki

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/article/10.1007/s10836-018-5741-x/fulltext.html

Reference34 articles.

1. Baumann RC (2001) Soft errors in advanced semiconductor devices-part I: the three radiation sources. IEEE Trans Device Mat Reliability 1(1):17–22

2. Baumann RC (2005) Radiation-induced soft errors in advanced semiconductor technologies. IEEE Trans on Device and Materials Reliability 5(3):305–316

3. Chen CW, Wu CW (2010) An adaptive code rate EDAC scheme for 16-bit random access memory. In: Proc. Int’l Conf. Design automation and Test in Europe (DATE), pp. 735–740

4. Van de Goor AJ, Schanstra I (2002) Address and data scrambling: causes and impact on memory tests. In: Proc. IEEE Int’l Workshop on Electronic Design, Test and Applications, pp. 128–136

5. Hamming RW (1950) Error detecting and correcting codes. Bell Syst Tech J 29:147–160

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