MATLAB-Open Source Tool Based Framework for Test Generation for Digital Circuits Using Evolutionary Algorithms
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
https://link.springer.com/content/pdf/10.1007/s10836-023-06088-1.pdf
Reference42 articles.
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2. Abramovici M, Kulikowski JJ, Menon PR, Miller DT (1986) SMART And FAST: Test Generation for VLSI Scan-Design Circuits. In: IEEE Design Test Compt 3(4):43–54. https://doi.org/10.1109/MDT.1986.294975
3. Alateeq MM, Pedrycz W (2017) Analysis of optimization algorithms in automated test pattern generation for sequential circuits. In Proc. The IEEE Int Conf Sys Man Cybern (SMC). Banff, AB, Canada 1834–1839. https://doi.org/10.1109/SMC.2017.8122883
4. Arslan T, O'Dare MJ (1997) A genetic algorithm for multiple fault model test generation for combinational VLSI circuits. In Proc. Second International Conference On Genetic Algorithms In Engineering Systems: Innovations And Applications. Glasgow, UK, 462–466. https://doi.org/10.1049/cp:19971224
5. Baid A, Srivastava AK (2013) Generating test patterns for fault detection in combinational circuits using genetic algorithm". In Proc Students Conf Eng Sys (SCES), Allahabad, India, 1–4. https://doi.org/10.1109/SCES.2013.6547506
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