Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems
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Publisher
Springer Science and Business Media LLC
Link
https://link.springer.com/content/pdf/10.1007/s10836-024-06104-y.pdf
Reference45 articles.
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3. Beerel PA, Ozdag RO, Ferretti M (2010) A designer’s guide to asynchronous VLSI. Cambridge University Press
4. Beigné E, Clermidy F, Vivet P, Clouard A, Renaudin M (2005) An asynchronous NOC architecture providing low latency service and its multi-level design framework. In: Proc. 11th IEEE International Symposium on Asynchronous Circuits and Systems. IEEE. p. 54–63
5. Beigné E, Vivet P (2006) Design of on-chip and off-chip interfaces for a GALS NoC architecture. In: Proc. 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC’06). IEEE. p. 10 pp.–183
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