An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture-Reference-Cited by-同舟云学术

An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture

Published:2005 Issue: Volume: Page:77-86
ISSN:0302-9743
Container-title:Embedded and Ubiquitous Computing – EUC 2005
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Author:

Musfiquzzaman Akanda Md.,Abderazek Ben A.,Kawata Sotaro,Sowa Masahiro

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/11596356_11.pdf

Reference7 articles.

1. Akanda, M.M., Abderazek, B.A., Yoshinaga, T., Sowa, M.: FaRMqs: Hybrid Processor Architecture in Verilog HDL. In: IPSJ 67th Conf., March 2 - 3 (2005);

2. Parallel Execution in Parallel Queue Processor, IPSJ, 66th Conf., March 9 11, pp. 1–70 (2004)

3. Abderazek, B.A., Nikolova, K., Sowa, M.: FARM-Queue Mode: On a Practical Queue Execution Model. In: Proceedings of the Int. Conf. on Circuits and Systems, Computers and Communications, Tokushima, Japan, July 2001, pp. 939–944 (2001)

4. Sowa, M., Abderazek, B.A., Shigeta, S., Nikolova, K., Yoshinaga, T.: Proposal and Design of a Parallel Queue Processor Architecture (PQP). In: 14th IASTED Int. Conf. on Parallel and Distributed Computing and System, Cambridge, USA, November 2002, pp. 554–560 (2002)

5. VijayKrishnan, N.: Issues in the Design of JAVA Processor Architecture. PhD dissertation, University of South Florida, Tampa, FL-33620 (December 1998)

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