Author:
Sobolevsky P. I.,Bakhanovich S. V.,Gorbach A. N.
Publisher
Springer Science and Business Media LLC
Reference9 articles.
1. J. Ramanujam and P. Sadayappaan, “Tiling of iteration spaces for multicomputers,” Proc. of Int. Conf. on Parallel Processes, 2, 179–186 (1990).
2. P. Boulet, A. Darte, T. Risset, and Y. Robert, “(Pen)-ultimate tiling?” Integration, The VLSI J., 17, 33–51 (1994).
3. J. Xue, “Communication-minimal tiling of uniform dependence loops,” J. of Parallel and Distributed Comput., 1, No. 42, 42–59 (1997).
4. R. Schreiber and J. Dongarra, “Automatic blocking of nested loops,” Tech. rep. 90.38, RIACS (1997).
5. H. Ohta, Y. Saito, M. Kainaga, and H. Ono, “Optimal tile size adjustment in compiling general DOACROSS loop nests,” in: Proc. Int. Conf. on Supercomput., ACM Press, (1995), pp. 270–279.