1. M. Mishra and S. Goldstein, “Defect Tolerance at the End of the Roadmap,” in Proc. International Test Conference, 2003, pp. 1201-1210.
2. E. J. Nowack, “Maintaining the Benefits of CMOS scaling when Scaling Bogs Down,” IBM Journal of Research and Development, no. 2/3, Mar.-May 2002.
3. S. C. Goldstein and M. Budiu, “NanoFabrics: Spatial Computing Using Molecular Electronics,” in Proc. International Symposium on Computer Architecture, 2001, pp. 178-189.
4. S. C. Goldstein and D. Rosewater, “Digital Logic Using Molecular Electronics,” in Proc. IEEE International Solid State Circuits Conference, vol. 1, 2002, pp. 204-459.
5. M. Butts, A. DeHon, and S. C. Goldstein, “Molecular Electronics: Devices, Systems and Tools for Gigagate, Gigabit Chips,” in Proc. International Conference on Computer-Aided Design, 2002, pp. 433-440.