1. Alameldeen, A.R., David A. Wood: Variability in architectural simulations of multi-threaded workloads. In: Proceedings of the International Symposium on High-Performance Computer Architecture, Ananeim, CA, February (2003).
2. Alameldeen, A.R., Wood, D.A.: IPC considered harmful for multiprocessor workloads. IEEE Micro
26(4), 8–17, (2006).
3. Barr, K.C., Asanovic, K.: Branch trace compression for snapshot-based simulation. International Symposium on Performance Analysis of Systems and Software 25–36, Anstin, TX (2006).
4. Cain, H.W., Lepak, K.M., Schwartz, B.A., Lipasti, M.H.: Precise and accurate processor simulation. In: Workshop on Computer Architecture Evaluation using Commercial Workloads, Boston, MA, February (2002).
5. Chung, E.S., Papamichael, M., Nurvitadhi, E., Hoe, J.C., Mai, K., Falsafi, B.: ProtoFlex: Towards scalable, full-system multiprocessor simulations using FPGAs. ACM Transactions on Reconfigurable Technology and Systems, Article 15, 2(2), June (2009).