Author:
Liu Chuanyang,Xiao Jinqiu,Zhang Yurong,Zeng Fantai
Reference8 articles.
1. Benini,L., De Micheli, G., “Networks on Chips: A New SOC Paradigm” Computer, Vol. 35, No. 1, pp. 70–78, Jan. 2002 (2002)
2. Partha Pratim Pande, Cristian Grecu, Michael Jones, Andre Ivanov, Res Saleh, “Evaluation of MP-SoC Interconnection Architectures”, Proceedings of 4th IWSOC, 19th-21st July, Banff, Alberta, Canada.
3. Nobuaki Takahashi,, “3-Diensional Memory Module”, 1996, Electronic Components and Technology Conference. (1996)
4. Paul M. Belemjian,, “SiGe HBT Microprocessor Core Tes Vehicle”, PROCEEDINGS OF THE IEEE, Vol. 93, No. 9, SEPTEMBER 2005. (2005)
5. Sergey Edward Lyshevski, “Design of Three-Dimensional Nanoscale Integrated Circuits”, Proceedings of 2005 5th IEEE Conference on Nanotechnology Nagoya, Japan, July 2005. (2005)