1. K. Chen, S. Malik, and D. I. August. Retargetable static timing analysis for embedded software. In Proceedings of the 14th International Symposium on System Synthesis, pages 39–44, 2001.
2. N. Ghazal, R. Newton, and J. Rabaye. Retargetable estimation scheme for dsp architectures. In Asia and South Pacific Design Automation Conference, pages 485–489, 2000.
3. J. Gong, D. Gajski, and A. Nicolau. Performance evaluation for application-specific architectures. IEEE Transactions on VLSI, 3(4):483–490, December 1995.
4. M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge, and R. B. Brown. Mibench: A free, commercially representative embedded benchmark suite. In IEEE 4th Annual Workshop on Workload Characterization, Austin, TX, USA, December 2001.
5. J. Kreku and J.-P. Soininen. Mappability estimate: A measure of the goodness of a processor-algorithm pair. In International Symposium on System-on-Chip Proceedings, pages 119–122, Tampere, Finland, November 2003.