Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support-Reference-Cited by-同舟云学术

Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support

Published:2010-11-09 Issue: Volume: Page:127-151
ISSN:
Container-title:Multiprocessor System-on-Chip
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Author:

Göhringer Diana,Hübner Michael,Becker Jürgen

Publisher

Springer New York

Link

http://link.springer.com/content/pdf/10.1007/978-1-4419-6460-1_6.pdf

Reference29 articles.

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3. P. Bertin, D. Roncin, J. Vuillemin, Introduction to Programmable Active Memories; Systolic Array Processor, Prentice Hall, pp. 300–309, 1989

4. C. Bobda, T. Haller, F. Mühlbauer, D. Rech, S. Jung, Design of Adaptive Multiprocessor on Chip Systems; In Proc. of the 20th Annual Conference on Integrated Circuits and Systems Design (SBCCI 2007), Copacabana, Rio de Janeiro, pp. 177–183, Sept. 3–6, 2007

5. L. Braun, D. Göhringer, T. Perschke, V. Schatz, M. Hübner, J. Becker, Adaptive real time image processing exploiting two dimensional reconfigurable architecture; Journal of Real-Time Image Processing, Springer, vol. 4, no. 2, pp.109–125, 2009

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