Runtime buffer management to improve the performance in irregular Network-on-Chip architecture
Author:
Publisher
Springer Science and Business Media LLC
Subject
Multidisciplinary
Link
http://link.springer.com/content/pdf/10.1007/s12046-015-0378-2.pdf
Reference26 articles.
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3. Al Faruque M A and Henkel J 2008 Minimizing virtual channel buffer for routers in on-chip communication architectures. In: Proc. Conf. Des., Autom. Test Euro. (DATE): 1238–1243
4. Al Faruque M A, Ebi T and Henkel J 2008 ROAdNoC: Runtime observability for an adaptive network on chip architecture. In: Proc. IEEE/ACM Int. Conf. Comput.-Aided Des. (ICCAD): 543–548
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