Design and Experimental Results
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Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-030-90103-5_5
Reference24 articles.
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2. R.J. Baker, CMOS: Circuit Design, Layout, and Simulation, 3 edn. (Wiley, Hoboken, NJ, USA, 2011). https://doi.org/10.1002/9780470891179
3. A. Balankutty, S.A. Yu, Y. Feng, P.R. Kinget, A 0.6-V zero-IF/low-IF receiver with integrated fractional-N synthesizer for 2.4-GHz ISM-band applications. IEEE J. Solid State Circuits 45(3), 538–553 (2010). https://doi.org/10.1109/JSSC.2009.2039827
4. S. Chatterjee, Y. Tsividis, P. Kinget, 0.5-V analog circuit techniques and their application in OTA and filter design. IEEE J. Solid State Circuits 40(12), 2373–2387 (2005a). https://doi.org/10.1109/JSSC.2005.856280
5. S. Chatterjee, Y. Tsividis, P. Kinget, A 0.5V filter with PLL-based tuning in 0.18 um CMOS, in ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005, San Francisco. (IEEE, 2005b), pp. 2004–2006. https://doi.org/10.1109/ISSCC.2005.1494091
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