True Random Number Generator (TRNG)
Author:
Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-31034-8_2
Reference44 articles.
1. Allini, E.N., Petura, O., Fischer, V., Bernard, F.: Optimization of the PLL configuration in a PLL-based TRNG design. In: Design, Automation Test in Europe Conference Exhibition (DATE), pp. 1265–1270 (2018)
2. Anandakumar, N.N., Hashmi, M.S., Sanadhya, S.K.: Field programmable gate array based elliptic curve Menezes-Qu-Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives. IET Circuits Devices Syst. 16, 382–398 (2022)
3. Anandakumar, N.N., Peyrin, T., Poschmann, A.: A very compact FPGA implementation of LED and PHOTON. In: International Conference on Cryptology in India, pp. 304–321. Springer, Berlin (2014)
4. Anandakumar, N.N., Sanadhya, S.K., Hashmi, M.S.: FPGA-based true random number generation using programmable delays in oscillator-rings. IEEE Trans. Circuits Syst. II Express Briefs 67(3), 570–574 (2020). https://doi.org/10.1109/TCSII.2019.2919891
5. Anandakumar, N.N., Sanadhya, S.K., Hashmi, M.S.: Design, implementation and analysis of efficient hardware-based security primitives. In: 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), pp. 198–199. IEEE, Piscataway (2020)
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