Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study-Reference-Cited by-同舟云学术

Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study

Published:2023 Issue: Volume: Page:526-537
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Mantovani Filippo,Vizcaino Pablo,Banchelli Fabio,Garcia-Gasulla Marta,Ferrer Roger,Ieronymakis Georgios,Dimou Nikolaos,Papaefstathiou Vassilis,Labarta Jesus

Publisher

Springer Nature Switzerland

Link

https://link.springer.com/content/pdf/10.1007/978-3-031-40843-4_39

Reference9 articles.

1. Farshchi, F., et al.: Integrating NVIDIA deep learning accelerator (NVDLA) with RISC-V SoC on FireSim. In: Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (EMC2), pp. 21–25. IEEE (2019)

2. Ficarelli, F., et al.: Meet monte cimone: exploring RISC-V high performance compute clusters. In: Proceedings of the 19th ACM International Conference on Computing Frontiers, pp. 207–208 (2022)

3. Kim, D.: FPGA-Accelerated Evaluation and Verification of RTL Designs. University of California, Berkeley (2019)

4. Kovač, M., et al.: FAUST: design and implementation of a pipelined RISC-V vector floating-point unit. Microprocess. Microsyst. 97, 104762 (2023)

5. Llort, G., et al.: On the usefulness of object tracking techniques in performance analysis. In: SC 2013: Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis (2013)

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1. Co-designing ab initio electronic structure methods on a RISC-V vector architecture;Open Research Europe;2024-08-05

2. Exploiting long vectors with a CFD code: a co-design show case;2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS);2024-05-27

3. A Performance Modelling-Driven Approach to Hardware Resource Scaling;Lecture Notes in Computer Science;2024