Time Based and VCO-ADCs from a Signal Processing Perspective
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Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-030-88067-5_1
Reference36 articles.
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3. M. Baert and W. Dehaene. A 5-GS/s 7.2-ENOB Time-Interleaved VCO-Based ADC Achieving 30.5 fJ/cs. IEEE Journal of Solid-State Circuits, 55(6):1577–1587, 2019
4. J. Daniels, W. Dehaene, M. Steyaert, and A. Wiesbauer. A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR. In 2010 Symposium on VLSI Circuits, pages 155–156, June 2010.
5. V. Dhanasekaran, M. Gambhir, M. M. Elsayed, E. Sanchez-Sinencio, J. Silva-Martinez, C. Mishra, L. Chen, and E. J. Pankratz. A Continuous Time Multi-BitΔΣADC Using Time Domain Quantizer and Feedback Element. IEEE J. Solid-State Circuits, 46(3):639–650, March 2011.
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