Publisher
Springer Nature Switzerland
Reference5 articles.
1. Khosrow Golshan, Physical Design Essentials, an ASIC Design Implementation Perspective, Springer Business Media, 2007
2. Khosrow Golshan, The Art of Timing Closure, Advanced ASIC Design Implementation, Springer Nature, Switzerland AG, 2020
3. A. Vittal and M. Marek-Sadowsks, “Crosstalk Reduction for VLSI”, IEEE Transaction on CAD, Vol. 16, No.3, March 1997
4. Kevin T. Tang and Eby G. Friedman, “Delay and noise estimation of CMOS logic gates driving coupled resistive-capacitive interconnections”, INTEGRATION, the VLSI Journal, Vol. 20, 2000
5. Sanjay Dabral and Timothy J. Maloney, Basic ESD and I/O Design, John Wiley & Sons, Inc. Publishing Company, 1998