A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach

Author:

Jamili Saeid,Mastrandrea Antonio,Cheikh Abdallah,Barbirotta Marcello,Menichelli Francesco,Angioli Marco,Olivieri Mauro

Publisher

Springer Nature Switzerland

Reference11 articles.

1. Vasudevan S (2017) Still a fight to get it right: verification in the era of machine learning. IEEE Int Conf Rebooting Comput (ICRC) 2017:1–8

2. Siemens (2022) Part 3: The 2022 wilson research group functional verification study [Online]. Available: https://blogs.sw.siemens.com/verificationhorizons/2022/10/30/part-3-the-2022-wilson-research-group-functional-verification-study/

3. Akram A, Sawalha L (2019) A survey of computer architecture simulation techniques and tools. IEEE Access 7:78120–78145

4. Scheffer L, Lavagno L, Martin G (2006) EDA for IC system design, verification, and testing (Electronic Design Automation for Integrated Circuits Handbook). CRC Press, Inc.

5. Mehta AB (2018) ASIC/SoC functional design verification. Springer, Berlin

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