Author:
Yoshii Kazutomo,Sankaran Rajesh,Strempfer Sebastian,Levental Maksim,Hammer Mike,Miceli Antonino
Publisher
Springer International Publishing
Reference51 articles.
1. Hameed, R., et al.: Understanding sources of inefficiency in general-purpose chips. In: Proceedings of the 37th Annual International Symposium on Computer Architecture, pp. 37–47 (2010)
2. Ovtcharov, K., Ruwase, O., Kim, J.-Y., Fowers, J., Strauss, K., Chung, E.S.: Accelerating deep convolutional neural networks using specialized hardware. Microsoft Res. Whitepaper 2(11), 1–4 (2015)
3. Kahng, A.B.: AI system outperforms humans in designing floorplans for microchips. Nature 594(7862), 183–185 (2021)
4. Hammer, M., Yoshii, K., Miceli, A.: Strategies for on-chip digital data compression for X-ray pixel detectors. J. Instrum. 16, P01025 (2021)
5. Genc, H., et al.: Gemmini: an agile systolic array generator enabling systematic evaluations of deep-learning architectures (2019)