Parallel Implementation of PIPO Block Cipher on 32-bit RISC-V Processor-Reference-Cited by-同舟云学术

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Parallel Implementation of PIPO Block Cipher on 32-bit RISC-V Processor

Published:2021 Issue: Volume: Page:183-193
ISSN:0302-9743
Container-title:Information Security Applications
language:
Short-container-title:

Author:

Kwak YuJin,Kim YoungBeom,Seo Seog Chung

Publisher

Springer International Publishing

Link

https://link.springer.com/content/pdf/10.1007/978-3-030-89432-0_15

Reference19 articles.

1. Lecture Notes in Computer Science;H Kim,2021

2. Kim, H.: A new method for designing lightweight S-boxes with high differential and linear branch numbers, and its application. Cryptology ePrint Archive, Report 2020/1582 (2020). https://eprint.iacr.org/2020/1582

3. Stoffelen, K.: Efficient cryptography on the RISC-V architecture. IACR Cryptol. ePrint Arch. 2019, 794 (2019)

4. Lecture Notes in Computer Science;D Hong,2014

5. Lecture Notes in Computer Science;D Hong,2006

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. AVX512Crypto: Parallel Implementations of Korean Block Ciphers Using AVX-512;IEEE Access;2023

2. Differential fault analysis on the lightweight block cipher plug‐in plug‐out;SECURITY AND PRIVACY;2022-11-09

3. Experimental evaluation of differential fault attack on lightweight block cipher PIPO;IET Information Security;2022-07-10

4. Single-Byte Error-Based Practical Differential Fault Attack on Bit-Sliced Lightweight Block Cipher PIPO;IEEE Access;2022

5. Differential Fault Attack on Lightweight Block Cipher PIPO;Information Security and Cryptology – ICISC 2021;2022

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