Low-Overhead Reuse Distance Profiling Tool for Multicore
Author:
Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-06156-1_49
Reference8 articles.
1. Ling, M., Ge, J., Wang, G.: Fast modeling L2 cache reuse distance histograms using combined locality information from software traces. J. Syst. Architect. 108, 101745 (2020). https://doi.org/10.1016/j.sysarc.2020.101745
2. Pericas, M., Taura, K., Matsuoka, S.: Scalable analysis of multicore data reuse and sharing. In: Proceedings of the 28th ACM International Conference on Supercomputing, ICS 2014, pp. 353–362. Association for Computing Machinery, New York, NY, USA (2014). https://doi.org/10.1145/2597652.2597674
3. Sasongko, M.A., Chabbi, M., Marzijarani, M.B., Unat, D.: ReuseTracker: fast yet accurate multicore reuse distance analyzer. ACM Trans. Architect. Code Optim. 19, 1–25 (2021). https://doi.org/10.1145/3484199
4. Schuff, D.L., Kulkarni, M., Pai, V.S.: Accelerating multicore reuse distance analysis with sampling and parallelization. In: Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, PACT 2010, pp. 53–64. Association for Computing Machinery, New York, NY, USA (2010). https://doi.org/10.1145/1854273.1854286
5. Tullsen, D.M., Eggers, S.J., Levy, H.M.: Simultaneous multithreading: maximizing on-chip parallelism. In: Proceedings of the 22nd Annual International Symposium on Computer Architecture, ISCA 1995, pp. 392–403. Association for Computing Machinery, New York, NY, USA (1995). https://doi.org/10.1145/223982.224449
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