On the Implementation of Edge Detection Algorithms with SORN Arithmetic
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Publisher
Springer International Publishing
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https://link.springer.com/content/pdf/10.1007/978-3-031-09779-9_1
Reference20 articles.
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2. Bärthel, M., Rust, J., Paul, S.: Hardware implementation of basic arithmetics and elementary functions for unum computing. In: 2018 52nd Asilomar Conference on Signals, Systems, and Computers, pp. 125–129, October 2018. https://doi.org/10.1109/ACSSC.2018.8645453
3. Bärthel, M., Rust, J., Paul, S.: Application-specific analysis of different SORN datatypes for unum type-2-based arithmetic. In: 2020 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5 (2020). https://doi.org/10.1109/ISCAS45731.2020.9181182
4. Bärthel, M., Knobbe, S., Rust, J., Paul, S.: Hardware implementation of a latency-reduced sphere decoder With SORN preprocessing. IEEE Access 9, 91387–91401 (2021). https://doi.org/10.1109/ACCESS.2021.3091778
5. Bocco, A., Durand, Y., De Dinechin, F.: SMURF: scalar multiple-precision unum Risc-V floating-point accelerator for scientific computing. In: Proceedings of the Conference for Next Generation Arithmetic 2019, pp. 1–8 (2019)
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