HNPU-V1: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching
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Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-34237-0_6
Reference28 articles.
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3. J. Lee et al., A 21mW low-power recurrent neural network accelerator with quantization tables for embedded deep learning applications, in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC) (2017), pp. 237–240
4. K. Ueyoshi et al., QUEST: a 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96 MB 3D SRAM using inductive coupling technology in 40 nm CMOS, in Proc. IEEE Int. Solid-State Circuits Conf. (2018), pp. 216–218
5. J. Lee et al., UNPU: a 50.6TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision, in 2018 IEEE International Solid-State Circuits Conference (ISSCC) (San Francisco, 2018), pp. 218–220
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