High Speed and Efficient Reconfigurable Histogram Equalisation Architecture for Image Contrast Enhancement
Author:
Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-43838-7_11
Reference15 articles.
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4. Chen, S.-D., Ramli, A.R.: Minimum mean brightness error bi-histogram equalization in contrast enhancement. IEEE Trans. Consum. Electron. 49(4) 1310–1319 (2003)
5. Alsuwailem, A.M., Alshebeili, S.A.: A new approach for real-time histogram equalization using FPGA. In: International Symposium on Intelligent Signal Processing and Communication Systems, pp. 397–400 (2005). https://doi.org/10.1109/ISPACS.2005.1595430
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