Parallel Implementation of Discrete Cosine Transform (DCT) Methods on GPU for HEVC

Author:

Kaplan MücahitORCID,Akman AliORCID

Publisher

Springer Nature Switzerland

Reference16 articles.

1. Akman, A., Cekli, S.: Design of approximate discrete cosine transform architecture for image compression with HEVC intra prediction. In: 12th International Conference on Electrical and Electronics Engineering (ELECO), pp. 155–158, Bursa, Turkey (2020)

2. Bross, B., Han, W.-J., Sullivian, G.J., Ohm, J.-R., Wiegand, T.: High Efficiency Video Coding (HEVC) Text Specification Draft 9. Available: http://phenix.it-sudparis.eu/jct/doc_end_user/current_document.php?id=6803. Last accessed 15 June 2023

3. Budagavi, M., Fuldseth, A., Bjontegaard, G., Sze, V., Sadafale, M.: Core transform design in the high efficiency video coding (HEVC) standard. IEEE J. Sel. Top. Signal Process. 7(6), 1029–1041 (2013)

4. Corana, A.: Architectural Evolution of Nvidia Gpus for High-Performance Computing. IEIIT-CNR, Tech. Rep, Genova (2015)

5. CUDA Refresher: The CUDA Programming Model. (2019). https://developer.nvidia.com/blog/cuda-refresher-cuda-programming-model/. Last accessed 18 July 2023

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