i-MAX: Just-In-Time Wakeup of Maximally Gated Router for Power Efficient Multiple NoC
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Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-21514-8_10
Reference11 articles.
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2. Yadav, S., Raj, R.: Power efficient network selector placement in control plane of multiple networks-on-chip. J. Supercomputing 78(5), 6664–6695 (2021). https://doi.org/10.1007/s11227-021-04098-4
3. Noh, S., Ngo, V., Jao, H., Choi, H.: Multiplane virtual channel router for network-on-chip design. In: First International Conference on Communications and Electronics, pp. 348–351 (2006)
4. Yadav, S., Laxmi, V., Gaur, M.: Multiple-NoC exploration and customization for energy efficient traffic distribution. In: IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), Salt Lake City, UT, USA (2020)
5. Neelkamal, Yadav, S., Kapoor, H.: Lightweight message encoding of power-gating controller for on-time wakeup of gated router in network-on-chip. In: 9th International Symposium on Embedded Computing and System Design (ISED), pp. 1–6 (2019)
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