Author:
Monga Kanika,Karnawat Eesha,Chaturvedi Nitin,Gurunarayanan S.
Publisher
Springer Nature Switzerland
Reference13 articles.
1. Geannopoulos, G., Dai, X.: An adaptive digital deskewing circuit for clock distribution networks. In: 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156), pp. 400–401 (1998)
2. Melloni, A., et al.: Tunable delay lines in silicon photonics: Coupled resonators and photonic crystals, a comparison. IEEE Photon. J. 2, 181–194 (2010)
3. Chen, C., Liu, S.: An infinite phase shift delay-locked loop with voltage-controlled sawtooth delay line. IEEE J. Solid-State Circ. 43, 2413–2421 (2008)
4. Bult, K., Wallinga, H.: A CMOS analog continuous-time delay line with adaptive delay-time control. IEEE J. Solid-State Circ. 23, 759–766 (1988)
5. Rehman, S., Khafaji, M., Carta, C., Ellinger, F.: A comparison of broadband and tunable delay-line structures in 45-nm CMOS. In: 2018 International Workshop on Integrated Nonlinear Microwave and Millimetre-wave Circuits (INMMIC) (2018)