Publisher
Springer Nature Switzerland
Reference18 articles.
1. Smith, K.C.: The prospects for multivalued logic: a technology and applications view. IEEE Trans. Comput. C–30(9), 619–634 (1981)
2. Raychowdhury, A., Roy, K.: Carbon-nanotube-based voltage-mode multiple-valued logic design. IEEE Trans. Nanotechnol. 4(2), 168–179 (2005)
3. Lin, S., Kim, Y.-B., Lombardi, F.: Design of a ternary memory cell using CNTFETs. IEEE Trans. Nanotechnol. 11(5), 1019–1025 (2012)
4. Lin, S., Kim, Y.-B., Lombardi, F.: CNTFET-based design of ternary logic gates and arithmetic circuits. IEEE Trans. Nanotechnol. 10(2), 217–225 (2011)
5. Srinivasu, B., Sridharan, K.: Low-complexity multiternary digit multiplier design in CNTFET technology. IEEE Trans. Circuits Syst. II Express Briefs 63(8), 753–757 (2016)
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献