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Reference19 articles.
1. Ababei, C., Selvakkumaran, N., Bazargan, K., Karypis, G.: Multi-objective circuit partitioning for cutsize and path-based delay minimization. In: Proceedings of the 2002 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2002, pp. 181–185. Association for Computing Machinery, New York (2002). https://doi.org/10.1145/774572.774599
2. Çatalyürek, Ü.V., et al.: More Recent Advances in (Hyper)Graph Partitioning. Technical report arXiv:2205.13202, arXiv (2022). http://arxiv.org/abs/2205.13202
3. Cong, J., Wu, C.: Global clustering-based performance-driven circuit partitioning. In: Proceedings of the 2002 International Symposium on Physical Design, ISPD 2002, pp. 149–154. Association for Computing Machinery, New York (2002). https://doi.org/10.1145/505388.505424
4. Corno, F., Reorda, M.S., Squillero, G.: RT-level ITC’99 benchmarks and first ATPG results. J. IEEE Des. Test Comput. 17(3), 44–53 (2000)
5. Diwan, A.A., Rane, S., Seshadri, S., Sudarshan, S.: Clustering techniques for minimizing external path length. In: Proceedings of the 22th International Conference on Very Large Data Bases, pp. 342–353 (1996)