1. Adamski M, Barkalov A (2006) Architectural and sequential synthesis of digital devices. University of Zielona Góra Press, Zielona Góra
2. Asahar P, Devidas S, Newton A (1992) Sequential logic synthesis. Kluwer Academic Publishers, Boston
3. Baranov S (2008) Logic and system design of digital systems. TUT Press, Tallinn
4. Barkalov A, Titarenko L, Chmielewski S (2007) Optimization of Moore FSM on CPLD. In: Proceedings of the sixth international conference CAD DD’07, vol 2. Minsk, pp 39–45
5. Barkalov A, Titarenko L, Wiśniewski R (2006) Optimization of address circuit of compositional microprogram unit. In: Proceedings of the IEEE east-west design and test workshop (EWDTW’06), Sochi, Kharkov, 2006. Kharkov National University of Radioelectronics, pp 167–170