Technique for Vendor and Device Agnostic Hardware Area-Time Estimation

Author:

Wijesundera Deshya,Shah Kushagra,Liyanage Kisaru,Prakash Alok,Srikanthan Thambipillai,Perera Thilina

Publisher

Springer International Publishing

Reference19 articles.

1. FPGA Market by Type, Verticals, Architecture, Technology Node, and Geography - Forecast to 2022 (2016). https://bit.ly/2u0Tq5r

2. Bilavarn, S., et al.: Design space pruning through early Estimations of area/delay tradeoffs for FPGA Implementations. In: TCAD 2006 (2006)

3. Brandolese, C., et al.: An area estimation methodology for FPGA based designs at systemc-level. In: DAC 2004 (2004)

4. Chuong, M.: Rapid area-time estimation technique for porting C-based applications onto FPGA platforms. Scalable Comput. Pract. Exp. 8(4), 359–371 (2008)

5. Hara, Y., et al.: CHStone: a benchmark program suite for practical C-based high-level synthesis. In: ISCAS 2008 (2008)

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