1. Belous, A. I., Turtsevich, A. S., Chigir, G. G., & Yemelyanov, A. V. (2011). Methods for improving the reliability of ICs based on test structures (p. 240). Ministry of Education of the Republic of Belarus, Gomel State University named after F. Skorina-Gomel. isbn 978-985-439-551-7 (in Russian).
2. Colbourne, E. D., Coverley, G. P., & Behera, S. K. (1974). Reliability of MOS LSI. TIIER, No. 2, pp. 154–178.
3. Arutyunov, P. A., & Kejyan, K. A. (1977). The use of test structures in assessing the quality and reliability of LSI. In Microelectronics (Vol. 6, 6th ed., pp. 521–531). (http://www.ftian.ru/journals/mikelek/) (in Russian).
4. Bryunin, V. N., & Ustinov, V. F. (1979). Application of technological test structures in the development and production of integrated circuits. In Electronic Engineering – Ser. 8 (Vol. 2, pp. 22–30). (https://istokmw.ru/elektronnaya-tehnika/)
5. Ovcharenko, V. I., & Sevostyanov, V. E. Methods of analyzing the quality of ICs in their production. In Reviews on ET –Ser. 3, Microelectronics (Vol. 1982, 1 (870) ed., pp. 3–35). (http://www.ftian.ru/journals/mikelek/)