Placement Algorithm of Superconducting Energy-Efficient Magnetic FPGA
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Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-15699-1_5
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4. J. Monteiro, R. Van Leuken (eds.) Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation: 19th International Workshop, PATMOS 2009, Delft, September 9–11, 2009. Revised Selected Papers, vol. 5953 (Springer Science & Business Media, Berlin, 2010)
5. A.G. Ye, Using the minimum set of input combinations to minimize the area of local routing networks in logic clusters containing logically equivalent I/Os in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 18(1), 95–107 (2009)
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