Digital Twin for Secure Semiconductor Lifecycle Management

Author:

Tehranipoor Mark,Zamiri Azar Kimia,Asadizanjani Navid,Rahman Fahim,Mardani Kamali Hadi,Farahmandi Farimah

Publisher

Springer Nature Switzerland

Reference153 articles.

1. H. Khattri, N.K.V. Mangipudi, S. Mandujano, HSDL: a security development lifecycle for hardware technologies, in 2012 IEEE International Symposium on Hardware-Oriented Security and Trust (IEEE, Piscataway, 2012), pp. 116–121

2. G. Dessouky, D. Gens, P. Haney, G. Persyn, A. Kanuparthi, H. Khattri, J.M. Fung, A.-R. Sadeghi, J. Rajendran, {HardFails}: insights into {Software-Exploitable} hardware bugs, in 28th USENIX Security Symposium (USENIX Security 19) (2019), pp. 213–230

3. Md.S. Ul Islam Sami, F. Rahman, F. Farahmandi, A. Cron, M. Borza, M. Tehranipoor, End-to-end secure SoC lifecycle management, in 2021 58th ACM/IEEE Design Automation Conference (DAC) (IEEE, Piscataway, 2021), pp. 1295–1298

4. S. Ray, E. Peeters, M.M. Tehranipoor, S. Bhunia, System-on-chip platform security assurance: architecture and validation. Proc. IEEE 106(1), 21–37 (2017)

5. M.M. Hossain, A. Vafaei, K.Z. Azar, F. Rahman, F. Farahmandi, M. Tehranipoor, SoCFuzzer: SoC vulnerability detection using cost function enabled fuzz testing, in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) (IEEE, Piscataway, 2023), pp. 1–6

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