Empowering SysML-Based Software Architecture Description with Formal Verification: From SysADL to CSP-Reference-Cited by-同舟云学术

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Empowering SysML-Based Software Architecture Description with Formal Verification: From SysADL to CSP

Published:2020 Issue: Volume: Page:101-117
ISSN:0302-9743
Container-title:Software Architecture
language:
Short-container-title:

Author:

Dias Fagner,Oliveira Marcel,Batista Thais^ORCID,Cavalcante Everton^ORCID,Leite Jair,Oquendo Flavio^ORCID,Araújo Camila

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-030-58923-3_7

Reference18 articles.

1. Araujo, C., Cavalcante, E., Batista, T., Oliveira, M., Oquendo, F.: A research landscape on formal verification of software architecture description. IEEE Access 7, 171752–171764 (2019)

2. Lecture Notes in Computer Science;C Barrett,2011

3. Clements, P., et al.: Documenting Software Architectures: Views and Beyond, 2nd edn. Addison-Wesley, Reading (2011)

4. Formal Systems (Europe) Ltd.: Process Behaviour Explorer - ProBE User Manual. FSEL, United Kingdom (2003)

5. Gibson-Robinson, T., Armstrong, P., Boulgakov, A., Roscoe, A.W.: FDR3: a parallel refinement checker for CSP. Int. J. Softw. Tools Technol. Transfer. 18, 149–167 (2016)

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Generating Formal Software Architecture Descriptions from Semi-Formal SysML-Based Models: A Model-Driven Approach;Computational Science and Its Applications – ICCSA 2021;2021

2. Multiclock Constraint System Modelling and Verification for Ensuring Cooperative Autonomous Driving Safety;Journal of Advanced Transportation;2020-12-05

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