ROM-Based Encoder with Bubble Error Correction-Reference-Cited by-同舟云学术

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ROM-Based Encoder with Bubble Error Correction

Published:2020-11-28 Issue: Volume: Page:429-439
ISSN:0930-8989
Container-title:Springer Proceedings in Physics
language:
Short-container-title:

Author:

Bellavin Mikhail A.^ORCID,Budanov Dmitry O.^ORCID

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-030-58868-7_48

Reference17 articles.

1. M. Bellavin, D. Budanov, Study of bubble errors conversion in a modified ROM-encoder, in IEEE International Conference on Electrical Engineering and Photonics (EExPolytech) (IEEE, St. Petersburg, 2019), pp. 58–61

2. D. Budanov, D. Morozov, M. Pilipko, An 8-bit analog-to-digital converter with a novel encoder using 90 nm CMOS, in IEEE International Conference on Electrical Engineering and Photonics (EExPolytech) (IEEE, St. Petersburg, 2018), pp. 56–59

3. M. Rahman, K. Baishnab, F. Talukdar, A novel ROM architecture for reducing bubble and metastability errors in high speed flash ADCs. IEEE J. Solid-State Circ. 43(9), 1982–1990 (2008)

4. I. Piatak, M. Pilipko, D. Morozov, Design considerations for pipelined ADCs, in IEEE NW Russia Young Researchers in Electrical and Electronic Engineering Conference (EIConRusNW) (IEEE, St. Petersburg, 2016), pp. 646–648

5. Y. Lin, C. Lin, S. Chang, A 5-bit, 3.2- GS/s flash ADC with a digital offset calibration scheme, IEEE Trans. VLSI Syst. 18(3), 509–513 (2010)

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative Analysis of Switching Schemes for 8-bit Arrays in Binary DACs;2022 International Conference on Electrical Engineering and Photonics (EExPolytech);2022-10-20

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