Cips: The Cache Intrusion Prevention System
Author:
Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-70903-6_1
Reference44 articles.
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3. Bazm, M., Sautereau, T., Lacoste, M., et al.: Cache-based side-channel attacks detection through intel cache monitoring technology and hardware performance counters. In: Third International Conference on Fog and Mobile Edge Computing, FMEC 2018, Barcelona, Spain, 23–26 April 2018, pp. 7–12. IEEE (2018)
4. Bernstein, D.J.: Cache-Timing Attacks on AES (2005). https://cr.yp.to/papers.html#cachetiming
5. Bienia, C., Kumar, S., Singh, J.P., et al.: The PARSEC benchmark suite: characterization and architectural implications. In: 17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, 25–29 October 2008, pp. 72–81. ACM (2008)
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