Design of Fast-SSC Decoder for STT-MRAM Channel

Author:

Cui Jianming,Bao Zengxiang,Zhang Xiaojun,Guo Hua,Chen Geng

Publisher

Springer International Publishing

Reference12 articles.

1. Van Beek, S., et al.: Impact of self-heating on reliability predictions in STT-MRAM. In: IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, pp. 25.2.1–25.2.4 (2018)

2. Song, Y.J., et al.: Demonstration of highly manufacturable STT-MRAM embedded in 28 nm logic. In: IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, pp. 18.2.1–18.2.4 (2018)

3. Zhang, M., Wu, F., Huang, H., Xia, Q., Zhou, J., Xie, C.: FPGA-based failure mode testing and analysis for MLC NAND flash memory. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), Lausanne, pp. 434–439 (2017)

4. Yang, K., Zhao, Y., Yang, J., Xue, X., Lin, Y., Bae, J.: Impacts of external magnetic field and high temperature disturbance on MRAM reliability based on FPGA test platform. In: 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, pp. 1–4 (2015)

5. Tal, I., Vardy, A.: List decoding of polar codes. IEEE Trans. Inf. Theory 61(5), 2213–2226 (2015)

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