Author:
Babu J. Chinna,Raju K. Naveen Kumar
Publisher
Springer International Publishing
Reference10 articles.
1. Jia, L., Gao, Y.,& Tenhumen, H. (1999). Efficient VLSI implementation of radix-8 FFT algorithm. In Proceeding IEEE Pacific Rim Conference, Communications, Computers and Signal Processing, (pp. 468–471).
2. Ma, Y. (1999). An effective memory addressing scheme forFFT processors. IEEE Transactions Signal Processing, 47, 907–911.
3. Ma, Y., & Wanhammar, L. (2000). A hardware efficient control of memory addressing for high-performance FFT processors. IEEE Transactions Signal Processing, 48, 917–921.
4. Jiang, Y., Zhou, T., Tang, Y., & Wang, Y. (2002). Twiddle-factorbased FFT algorithm with reduced memory access. In Proceeding IEEE IPDPS’2002, April 2002 (pp. 70–77).
5. Babu, J. C., Rao, N. M., Ramana, K. et al. (2022). A dynamic hybrid decoder apprroach using EG-LDPC codes for signal processing applications. Wireless Personal Communications, 122, 1435–1454. https://doi.org/10.1007/s11277-021-08956-5