Fast Implementation of AES Modes Based on Turing Architecture
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Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-23724-9_44
Reference12 articles.
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3. Cheong, H.-S., Lee, W.-K.: Fast implementation of block ciphers and PRNGs for Kepler GPU architecture. In: 2015 5th International Conference on IT Convergence and Security (ICITCS) (2015). https://doi.org/10.1109/icitcs.2015.7292982
4. Barlas, G., Hassan, A., Jundi, Y.A.: An analytical approach to the design of parallel block cipher encryption/decryption: a CPU/GPU case study. In: 2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing (2011). https://doi.org/10.1109/pdp.2011.51
5. Che, S., Boyer, M., Meng, J., Tarjan, D., Sheaffer, J.W., Skadron, K.: A performance study of general-purpose applications on graphics processors using CUDA. J. Parallel Distrib. Comput. 68, 1370–1380 (2008). https://doi.org/10.1016/j.jpdc.2008.05.014
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