Implementation of Givens QR-Decomposition in FPGA-Reference-Cited by-同舟云学术

Implementation of Givens QR-Decomposition in FPGA

Published:2002 Issue: Volume: Page:458-465
ISSN:0302-9743
Container-title:Parallel Processing and Applied Mathematics
language:
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Author:

Sergyienko Anatoli,Maslennikov Oleg

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-48086-2_50

Reference16 articles.

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4. Kanevski, J.S., Sergyienko, A.M., Piech, H.: A method for the structural synthesis of pipelined array processors. In: Proc. 1-st Int. Conf. ”Parallel Processing and Applied Mathematics”, PPAM’94, Częstochowa (Poland), Sept. 14–16 (1994) 100–108.

5. Guzinski, A., Kanevski, J.S., Sergyienko, A.M.: A method for mapping unimodular loops into application-specific parallel architectures.In: Proc. 2-nd Int. Conf. on Parallel Processing and Applied Math.-PPAM’97, Zakopane (Poland) (1997) 362–371.

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