Proof of Correctness of a Processor with Reorder Buffer Using the Completion Functions Approach-Reference-Cited by-同舟云学术

Proof of Correctness of a Processor with Reorder Buffer Using the Completion Functions Approach

Published:1999 Issue: Volume: Page:47-59
ISSN:0302-9743
Container-title:Computer Aided Verification
language:
Short-container-title:

Author:

Hosabettu Ravi,Srivas Mandayam,Gopalakrishnan Ganesh

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/3-540-48683-6_7

Reference13 articles.

1. Lect Notes Comput Sci;C. Barrett,1996

2. Lect Notes Comput Sci;D. Cyrluk,1994

3. Ganesh Gopalakrishnan and Phillip Windley, editors. Formal Methods in Computer-Aided Design, FMCAD’ 98, volume 1522 of LNCS, Palo Alto, CA, USA, November 1998. Springer-Verlag. 59, 59

4. Ravi Hosabettu, Ganesh Gopalakrishnan, and Mandayam Srivas. A proof of correctness of a processor implementing Tomasulo’s algorithm without a reorder buffer. 1999. Submitted for publication. 58

5. Ravi Hosabettu. PVS specification and proofs of all the examples verified with the completion functions approach, 1999. Available at http://www.cs.utah.edu/~hosabett/pvs/processor.html . 53

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures;Journal of Automated Reasoning;2006-10-07

2. Putting it all together – Formal verification of the VAMP;International Journal on Software Tools for Technology Transfer;2006-05-02

3. Automatic Formal Verification of Liveness for Pipelined Processors with Multicycle Functional Units;Lecture Notes in Computer Science;2005

4. Reasoning about Infinite State Systems Using Boolean Methods;Lecture Notes in Computer Science;2003

5. Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP;Lecture Notes in Computer Science;2003