Abstract
AbstractStringent power budgets in battery powered platforms have led to the development of energy saving techniques such as Dynamic Voltage and Frequency scaling (DVFS). For embedded system designers to be able to ripe the benefits of these techniques, support for efficient design space exploration must be available in system level simulators. The advent of the edge computing paradigm, with power constraints in the mW domain, has rendered this even more essential. Without a fast and accurate methodology for architecture simulation and energy estimation, the benefit of new ideas and solutions cannot be evaluated. In this paper, we propose a non-intrusive application controlled DVFS management implementation in the GEM5 simulator, used with GEM5’s system call emulation mode. We also propose a novel architecture independent energy model based on categorization of different measurable workload classes. Our energy model is parametrized and calibrated with power measurements on a SAM4L microcontroller board, containing an ARM Cortex M4 processor. Together with the GEM5 output statistics, the model accurately estimates the total energy consumption of our simulated system. The results from our modified GEM5 simulator are validated with representative signal processing applications. After correction of systematic offset errors, our results deviate with less than 4% compared to measurements from the SAM4L microcontroller. Our contributions in this paper can easily be tailored to other processor models in GEM5 and to future versions of GEM5. It will therefore enable system architects to explore new techniques and compare the improvements relative to existing architectures.
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modeling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
Reference31 articles.
1. Aleem, M., Islam, M.A., & Iqbal, M.A. (2016). A comparative study of heterogeneous processor simulators. International Journal of Computer Applications 148(12).
2. Alioto, M. (2012). Ultra-low power VLSI circuit design demystified and explained: a tutorial. IEEE Transactions on Circuits and Systems I: Regular Papers, 59(1), 3–29. https://doi.org/10.1109/TCSI.2011.2177004.
3. Andreou, A.G., Boahen, K.A., Pouliquen, P.O., Pavasovic, A., Jenkins, R.E., & Strohbehn, K. (1991). Current-mode subthreshold MOS circuits for analog VLSI neural systems. IEEE Transactions on Neural Networks, 2(2), 205–213. https://doi.org/10.1109/72.80331.
4. Atmel, S. (2015). AM4L Xplained pro user guide. http://ww1.microchip.com/downloads/en/devicedoc/Atmel-42074-SAM4L-Xplained-Pro_User-Guide.pdf.
5. Atmel. (2016). ATSAM ARM-based flash MCU SAM4L series datasheet. http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42023-ARM-Microcontroller-ATSAM4L-Low-Power-LCD_Datasheet-Summary.pdf. 42023HS-SAM-11/2016.
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Power and Frequency Intrinsic Channels on gem5;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
2. Emulating Covert Data Transmission on Heterogeneous SoCs;2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST);2023-12-13
3. PES: An Energy and Throughput Model for Energy Harvesting IoT Systems;2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS);2023-04
4. Emulating Covert Data Transmission on Heterogeneous SoCs;2023
5. Goal-driven scheduling model in edge computing for smart city applications;Journal of Parallel and Distributed Computing;2022-09