Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modelling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
Reference19 articles.
1. Draft ITU-T Recommendation and Final Draft International Standard of Joint Video Specification (ITU-T Rec. H.264 | ISO/IEC 14496-10 AVC), May. 2003.
2. S. Dutta, W. Wolf and A. Wolfe, “A Methodology to Evaluate Memory Architecture Design Tradeoffs for Video Signal Processors,” IEEE Trans. Circuits Syst. Video Technol, vol. 8, no. 1, 1998, pp. 36–53, Feb.
3. S.T. Fu, D.F. Zucker and M.J. Flynn, “Memory Hierarchy Synthesis of a Multimedia Embedded Processor,” IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD ’96, pp. 176–184, Oct. 1996.
4. T.-M. Liu et al., “A 125 μW, Fully Scalable MPEG-2 and H.264/AVC Video Decoder for Mobile Applications,” IEEE J. Solid-State Circuits, vol. 42, no. 1, 2007, pp. 161–169, Jan.
5. T.-M. Liu et al., “An 865-μW H.264/AVC Video Decoder for Mobile Applications,” IEEE Asian Solid-State Circuits Conference, 2005, pp. 301–304, Nov.
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